Sr. Soc/asic Physical Design Engineer (silicon Engineering)

SpaceX

Sunnyvale, CA, United States
Base: $170,000.00 - $230,000.00 py; bonus/equity: ...
On-site
5+ years asic physical design experience
Rtl2gdsii flow development expertise
Sta noise verification signoff skills
SpaceX is seeking a Senior Engineer to develop cutting-edge next-generation silicon for Starlink satellites and ground infrastructure

Job Summary

  • SpaceX is seeking a Senior Engineer to develop cutting-edge next-generation silicon for Starlink satellites and ground infrastructure.
  • The role involves performing partition synthesis, floorplanning, place and route, and resolving complex timing and congestion issues.
  • Candidates will receive a base salary between $170,000 and $230,000 plus stock options, comprehensive medical coverage, and paid time off.

Matching Summary

SpaceX is seeking a Senior Engineer to develop cutting-edge next-generation silicon for Starlink satellites and ground infrastructure.

Salary

Base: $170,000.00 - $230,000.00 per year; Bonus/Equity: Eligible for stock options, long-term incentives, and discretionary bonuses; Benefits: Comprehensive medical/vision/dental, 401(k), paid parental leave, 3 weeks vacation

Skills & Requirements

Must-have

  • 5+ years ASIC physical design experience
  • RTL2GDSII flow development expertise
  • STA noise verification signoff skills
  • Deep sub-micron FinFET process knowledge
  • Scripting in Python TCL Bash

Nice-to-have

  • DFT Scan MBIST LBIST understanding
  • CMOS analog circuit physical design
  • Self-driven can-do attitude
  • Dynamic cross-disciplinary team collaboration
  • Willingness to work extended hours

Key Requirements

  • Bachelor's degree in Electrical or Computer Engineering
  • US Citizenship or eligible immigration status per ITAR
  • 5+ years industry experience in ASIC physical design

Work Rights

Must be US citizen, permanent resident, refugee, asylee, or eligible for authorizations

Tailored Resume

Cover Letter