Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs
Job Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs.
Oversee the development and delivery of verification of IPs owned by the team, driving innovation in verification methodologies and collaborating with cross-functional teams.
Perform hands-on technical verification of FPGA IPs, developing verification plans, test benches, and environments to ensure design meets specification requirements.
Matching Summary
Lead or mentor a team of engineers working on FPGA IP verification, defining team priorities, setting goals, and monitoring performance through KPIs.
Skills & Requirements
Must-have
FPGA IP verification
System Verilog
OVM/UVM
constrained random verification
simulation tools
Nice-to-have
team leadership
technical excellence
innovation in verification
stakeholder management
Key Requirements
10+ years of experience in verification
Bachelor’s or Master’s degree in Electrical Engineering or related field
Proven expertise in RTL design and verification for FPGA architectures