Logic Design Engineer

Altera Digital Health

Haifa, Israel
Rtl design and simulation
Mixed-signal designs
High-speed ips
Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with their FPGA, CPLD, and IP technologies

Job Summary

  • Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with their FPGA, CPLD, and IP technologies.
  • The role involves designing and developing logic, RTL, and simulation for IP blocks, functional units, and subsystems, with a focus on mixed-signal and high-speed IPs.
  • Candidates must have a minimum of 10 years of industry experience delivering complex, high-performance integrated solutions and possess hands-on post-silicon experience.

Matching Summary

Altera is driving innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure with their FPGA, CPLD, and IP technologies.

Skills & Requirements

Must-have

  • RTL design and simulation
  • mixed-signal designs
  • high-speed IPs
  • power, performance, area, and timing goals
  • SerDes and PHY design
  • serial link chip architectures

Nice-to-have

  • analog behavior modeling
  • digital signal processing techniques
  • system architecture definition

Key Requirements

  • Minimum of 10 years of industry experience
  • B.Sc. or M.Sc. in Electrical Engineering
  • Proven expertise in SerDes and PHY design
  • Hands-on post-silicon experience

Work Rights

Not specified

Tailored Resume

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