Senior Logic Design Engineer, Cache Coherent Interconnects

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Base: 136,000 usd - 218,500 usd for level 3; bonus...
Hybrid
Verilog expertise required
Deep understanding of asic design flow
Experience in processor designs
As a member of our CPU Logic Design Team, you will be responsible for the design of CPU interconnect networks

Job Summary

  • As a member of our CPU Logic Design Team, you will be responsible for the design of CPU interconnect networks.
  • This position offers you the opportunity to have real impact in a dynamic, technology-focused company.
  • NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer.

Matching Summary

As a member of our CPU Logic Design Team, you will be responsible for the design of CPU interconnect networks.

Salary

Base: 136,000 USD - 218,500 USD for Level 3; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • Verilog expertise required
  • Deep understanding of ASIC design flow
  • Experience in processor designs

Nice-to-have

  • Strong background in computer architecture
  • Mentoring junior engineers and interns
  • Strong communication and interpersonal skills

Key Requirements

  • Master’s Degree in Electrical Engineering or equivalent experience
  • 5+ years of experience in high performance semiconductor designs

Work Rights

Not specified

Tailored Resume

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