Dft Manager

Marvell

Base: cad 142,100 - 189,400 py; bonus/equity: not ...
8+ years hands-on dft experience
Scan architecture and atpg methodologies
Memory and logic bist expertise
The DFT Manager is responsible for leading the definition, implementation, and execution of Design for Test strategies across complex silicon designs

Job Summary

  • The DFT Manager is responsible for leading the definition, implementation, and execution of Design for Test strategies across complex silicon designs.
  • This role ensures high test coverage, manufacturability, and product quality while balancing cost, schedule, and performance constraints.
  • Candidates will manage and mentor a team of DFT engineers while collaborating cross-functionally with design, verification, and manufacturing teams.

Matching Summary

The DFT Manager is responsible for leading the definition, implementation, and execution of Design for Test strategies across complex silicon designs.

Salary

Base: CAD 142,100 - 189,400 per annum; Bonus/Equity: Not specified; Benefits: Competitive compensation and great benefits

Skills & Requirements

Must-have

  • 8+ years hands-on DFT experience
  • Scan architecture and ATPG methodologies
  • Memory and logic BIST expertise
  • Tessent EDA tools proficiency
  • Silicon manufacturing and test processes

Nice-to-have

  • Strong scripting skills in Tcl or Python
  • Experience with advanced nodes and low-power designs
  • Exposure to heterogeneous multi-die chiplets
  • Previous people management leadership experience

Key Requirements

  • Bachelor's or Master's degree in Electrical Engineering
  • 8+ years of hands-on DFT experience
  • Eligibility to access export-controlled information under US law

Work Rights

Must be eligible to access export-controlled information as defined under applicable law

Tailored Resume

Cover Letter