Fvcto - Formal Verification Engineer

Inteelabs

Bangalore, India
Formal verification methodology
Model checking algorithms
Equivalence checking techniques
The role involves conducting comprehensive verification of IP and SoC microarchitecture using advanced formal verification tools and methodologies

Job Summary

  • The role involves conducting comprehensive verification of IP and SoC microarchitecture using advanced formal verification tools and methodologies.
  • Candidates will develop formal proofs, create abstraction models, and collaborate with design teams to resolve failing tests and improve verification infrastructure.
  • This position requires a deep understanding of BDD and DFG complexities to simplify modeling problems and formally prove protocols within the Data Center Group.

Matching Summary

The role involves conducting comprehensive verification of IP and SoC microarchitecture using advanced formal verification tools and methodologies.

Skills & Requirements

Must-have

  • Formal verification methodology
  • Model checking algorithms
  • Equivalence checking techniques
  • Abstraction models for convergence
  • Binary decision diagram (BDD) complexity

Nice-to-have

  • Collaboration with architects and RTL developers
  • Data flow graph (DFG) understanding
  • Protocol and architecture proving
  • Infrastructure improvement experience

Key Requirements

  • 4-9 years of experience in formal verification
  • BTech/MTech in Electronics, Electrical or CS
  • On-site presence required in Bangalore, India

Work Rights

Not specified

Tailored Resume

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