Dft Intern - Asic Student - Israel - Etr

Cisco UK

Caesarea, Israel
Dft logic insertion
Automatic test pattern generation (atpg)
Gate level simulations
The Design for Test (DFT) team's main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing

Job Summary

  • The Design for Test (DFT) team's main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing.
  • Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth.
  • At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.

Matching Summary

The Design for Test (DFT) team's main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing.

Skills & Requirements

Must-have

  • DFT logic insertion
  • Automatic Test Pattern Generation (ATPG)
  • Gate Level Simulations
  • deep-dive debugging simulation failures

Nice-to-have

  • friendly social easygoing
  • good sense of humor
  • ability to learn independently
  • team players enjoy big challenges

Key Requirements

  • B.Sc or M.Sc Electrical/Computer Engineer student
  • average grades above 85
  • students finishing second or third year
  • located in central/north Israel

Work Rights

Not specified

Tailored Resume

Cover Letter