Principal Vlsi Design Engineer, Sunnyvale, Ca

HPE

Sunnyvale, CA, United States
Base: usd 174,000 - 352,500; bonus/equity: variabl...
Onsite
Asic architecture and micro-architecture
Rtl coding in verilog or systemverilog
Networking asics design experience
Hewlett Packard Enterprise is a global edge-to-cloud company advancing the way people live and work with a culture that embraces varied backgrounds and flexibility

Job Summary

  • Hewlett Packard Enterprise is a global edge-to-cloud company advancing the way people live and work with a culture that embraces varied backgrounds and flexibility.
  • The Principal VLSI Design Engineer will define ASIC architecture, write high-quality RTL, collaborate with verification and physical design teams, and support silicon bring-up.
  • HPE offers comprehensive health and wellbeing benefits, personal and professional development programs, and an unconditionally inclusive work environment.

Matching Summary

Hewlett Packard Enterprise is a global edge-to-cloud company advancing the way people live and work with a culture that embraces varied backgrounds and flexibility.

Salary

Base: USD 174,000 - 352,500; Bonus/Equity: Variable incentives may be offered; Benefits: Comprehensive health and wellbeing benefits

Skills & Requirements

Must-have

  • ASIC architecture and micro-architecture
  • RTL coding in Verilog or SystemVerilog
  • Networking ASICs design experience
  • Collaboration with verification teams
  • Physical design constraints understanding
  • Onsite work 2 days per week

Nice-to-have

  • Strong written and verbal communication
  • Technical mentorship and innovation
  • Agile Scrum Development
  • Cross-Functional Teamwork
  • Growth Mindset
  • Design Thinking

Key Requirements

  • Bachelor’s or higher degree in Electrical Engineering or related field
  • Experience with UVM-based verification flows
  • US Citizenship preferred
  • Experience with EDA tools for simulation and synthesis

Work Rights

US Citizenship preferred

Tailored Resume

Cover Letter