The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability
Job Summary
The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability.
Key responsibilities include leading and executing layout design, collaborating with circuit designers, planning and managing layout schedules, and conducting thorough physical verification.
The role requires a Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or related field with 8+ years of experience in analog/mixed-signal IC layout design.
Matching Summary
The successful candidate will be responsible for leading the FPGA physical design and layout of complex digital, analog and mixed-signal integrated circuits (ICs), ensuring optimal performance, reliability, and manufacturability.
Skills & Requirements
Must-have
Analog/mixed-signal IC layout design
Cadence Virtuoso
Mentor Graphics
Physical verification (DRC, LVS, ERC, RV)
Analog circuit topologies
Nice-to-have
Technical mentorship
Cross-functional collaboration
Foundry partner interface
Key Requirements
8+ years of experience
Bachelor’s or Master’s degree
Expert proficiency with EDA tools
Deep understanding of analog circuit sensitivities