Soc Digital Physical Design Engineer - Mcu

NXP USA INC.

Catania, Italy
On-site
Physical design implementation
Rtl to gdsii flow
Floorplanning, power planning, synthesis
NXP USA Inc. is seeking a SoC Digital Physical Design Engineer for their Catania, Italy location to lead the physical design implementation of complex integrated circuits. The ideal candidate will have advanced knowledge in physical design methodologies and tools, as well as experience mentoring junior engineers

Job Summary

  • NXP is building new teams in Catania to create high impact microcontrollers (MCU) as part of NXP’s intelligent AI at the Edge.
  • Lead projects and execute the full physical design flow for complex digital blocks and top-level SoCs, including floorplanning, power planning, synthesis, place and route, clock tree synthesis, static timing analysis (STA), formal verification, and physical verification (DRC/LVS).
  • Mentor and guide junior and mid-level physical design engineers, providing technical leadership and fostering a collaborative team environment.

Matching Summary

Match Score: 85

NXP USA Inc. is seeking a SoC Digital Physical Design Engineer for their Catania, Italy location to lead the physical design implementation of complex integrated circuits. The ideal candidate will have advanced knowledge in physical design methodologies and tools, as well as experience mentoring junior engineers.

Skills & Requirements

Must-have

  • Physical design implementation
  • RTL to GDSII flow
  • Floorplanning, power planning, synthesis
  • Place and route, clock tree synthesis
  • Static timing analysis (STA)
  • Formal verification, physical verification
  • Power integrity (IR/EM) analysis
  • Advanced tech nodes 16ff and below

Nice-to-have

  • Develop advanced methodologies
  • Mentor junior engineers
  • Evaluate new EDA tools
  • Low-power design techniques

Key Requirements

  • Master's degree in Electrical Engineering or related field
  • Expert-level proficiency with Synopsys, Cadence, or Siemens EDA tools
  • Strong expertise in timing closure
  • Proven experience in power integrity analysis
  • Proficiency in scripting languages (Tcl, Python, Perl)
  • Prior experience in a technical leadership role

Work Rights

Not specified

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