Ingénieur Implémentation Physique Asic (3nm) H/f

Eviden

Les Clayes-sous-Bois, France
On-site
3nm asic implementation
Physical design flow
Verilog/systemverilog rtl
The position will involve implementing physical blocks integrated into ASICs using advanced technologies (3nm)

Job Summary

  • The position will involve implementing physical blocks integrated into ASICs using advanced technologies (3nm).
  • Responsibilities include floorplanning, conducting the physical implementation flow (synthesis, placement, clock tree, routing), timing convergence, chip finishing, power optimization, physical verification, and ECO implementation.
  • Join Eviden, a key player in next-generation digital transformation, and contribute to the future of tech in an equitable and inclusive environment.

Matching Summary

The position will involve implementing physical blocks integrated into ASICs using advanced technologies (3nm).

Skills & Requirements

Must-have

  • 3nm ASIC implementation
  • Physical design flow
  • Verilog/SystemVerilog RTL
  • TCL scripting
  • Perl/Python scripting
  • DRC/LVS/Antenna/Electromigration checks

Nice-to-have

  • Collaboration with logic design
  • PPA trade-off studies
  • Autonomous and rigorous work
  • Teamwork and communication skills

Key Requirements

  • Bac + 5 degree in engineering or equivalent
  • Specialization in micro-electronics/integrated circuit design
  • Experience with FPGA or ASIC synthesis tools
  • Familiarity with Git version control
  • Fluent English (written and oral)

Work Rights

Not specified

Tailored Resume

Cover Letter