Soc Silicon Top-level Floorplan Engineer

Google

Sunnyvale, CA, United States
Base: $192,000-$278,000; bonus/equity: included; b...
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Top-level floorplan creation
Physical layout of chip top-level
Block sizing and placement
** Google is seeking a Soc Silicon Top-level Floorplan Engineer to contribute to the development of innovative TPU technology for AI/ML applications. The role involves creating chip layouts, collaborating with cross-functional teams, and utilizing advanced design tools to meet performance goals. **

Job Summary

  • This role involves shaping the future of AI/ML hardware acceleration by driving cutting-edge TPU technology for Google's most demanding applications.
  • The engineer will create the initial physical layout of a chip top-level, defining block sizing, power grids, and clock distribution to meet performance, power, and area goals.
  • The position requires managing cross-functional interactions with architecture, RTL, and synthesis teams to deliver floor plan collaterals and drive sign-off for modern SoCs.

Matching Summary

Match Score: 75

** Google is seeking a Soc Silicon Top-level Floorplan Engineer to contribute to the development of innovative TPU technology for AI/ML applications. The role involves creating chip layouts, collaborating with cross-functional teams, and utilizing advanced design tools to meet performance goals. **

Salary

Base: $192,000-$278,000; Bonus/Equity: Included; Benefits: Included

Skills & Requirements

Must-have

  • Top-level floorplan creation
  • Physical layout of chip top-level
  • Block sizing and placement
  • Power grid and clock distribution
  • PPA goals optimization
  • Cross-functional collaboration
  • Full-chip planning and IP integration

Nice-to-have

  • Innovation in AI/ML hardware
  • Custom silicon solutions development
  • Driving early timing closure
  • Modern SoC implementation flows
  • Vendor evaluation expertise

Key Requirements

  • Experience with ASIC and SoC integration
  • Expertise in industry and internal tools
  • Knowledge of process node trade-offs
  • Ability to resolve structural or physical issues

Work Rights

Not specified

Tailored Resume

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