Silicon Design Flow Methodology And Automation - Lec.
Altera Digital Health
Penang, Malaysia
Logic equivalence check (lec) flows
Atpg model (gln) generation
Cadence conformal and/or synopsys formality
Define, develop, and maintain scalable automation, flows, and methodologies for silicon design verification and test enablement, focusing on Logic Equivalence Check (LEC) and ATPG model generation
Job Summary
Define, develop, and maintain scalable automation, flows, and methodologies for silicon design verification and test enablement, focusing on Logic Equivalence Check (LEC) and ATPG model generation.
Collaborate closely with design, ATPG, and CAD teams to deliver robust, automated solutions that improve productivity, correctness, DFT coverage, and simulation quality.
Drive automation initiatives to reduce manual effort, improve turnaround time, and increase design confidence and DFT coverage quality, potentially leveraging AI/ML techniques.
Matching Summary
Define, develop, and maintain scalable automation, flows, and methodologies for silicon design verification and test enablement, focusing on Logic Equivalence Check (LEC) and ATPG model generation.
Skills & Requirements
Must-have
Logic Equivalence Check (LEC) flows
ATPG model (GLN) generation
Cadence Conformal and/or Synopsys Formality
Tcl, Python, Perl, shell scripting
ECO verification flows
Nice-to-have
AI/ML techniques for efficiency
Version control systems (Git, Perforce)
Adapting across multiple EDA domains
Key Requirements
5+ years of experience in silicon design automation
Bachelor’s or Master’s degree in Electrical Engineering or related field