Senior Emulation Engineer

Intel Corporation

Phoenix, Arizona, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
Rtl coding proven capabilities
Fpga synthesis and partitioning tools
Lab environment debug skills
This senior Emulation Engineer will develop and enable Accelerator IPs by implementing complex hybrid models of SOCs and chiplet dies for validation purposes

Job Summary

  • This senior Emulation Engineer will develop and enable Accelerator IPs by implementing complex hybrid models of SOCs and chiplet dies for validation purposes.
  • The role involves creating FPGA and Hybrid FPGA models from RTL using synthesis, partitioning, and routing tools while defining new HW/SW capabilities.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, retirement plans, and vacation time.

Matching Summary

This senior Emulation Engineer will develop and enable Accelerator IPs by implementing complex hybrid models of SOCs and chiplet dies for validation purposes.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • RTL coding proven capabilities
  • FPGA synthesis and partitioning tools
  • Lab environment debug skills
  • Hybrid FPGA emulation model development

Nice-to-have

  • Linux administration or end user experience
  • Knowledge of Wireless and Networking Protocols
  • PCIE Scripting languages such as TCL and Perl

Key Requirements

  • Bachelor's degree with 6+ years experience OR Master's with 5+ years
  • 4+ years in RTL coding, Lab debug, and FPGAs/Emulation
  • Electrical/Electronic Engineering, Computer Engineering, or Computer Science degree

Work Rights

Not specified

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