Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions integrating CXL Ethernet NVLink PCIe and UALink technologies
Job Summary
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions integrating CXL Ethernet NVLink PCIe and UALink technologies.
The role involves developing sophisticated advanced node CMOS products including PLLs DLLs ADCs regulators amplifiers TX RX and CDRs.
Candidates must have a solid track record in implementing analog circuits for high-speed data transmission with design and tapeout experience in nodes like 20nm or newer.
Matching Summary
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions integrating CXL Ethernet NVLink PCIe and UALink technologies.
Skills & Requirements
Must-have
High-speed mixed-signal circuit design
Advanced CMOS node tapeout experience
PLL DLL ADC regulator design
Transistor-level feedback analysis
Lab chip bring-up and debugging
Nice-to-have
TIA design for optical applications
RFIC design for wireless systems
Python Matlab or C scripting
PCB design experience
Verilog RTL or DSP concepts
Key Requirements
Master's or PhD in EE preferred
Experience in 20nm or newer CMOS nodes
Proven implementation of high-speed data transmission circuits