Soc Physical Design And Sta Methodology Engineer

Samsung Electronics

Bangalore, India
Soc physical design flow development
Python tcl perl unix scripting
Synopsys cadence pnr signoff tools
The role focuses on developing production-grade physical design flows and methodologies for System LSI and Foundry technologies at Samsung Semiconductor India Research

Job Summary

  • The role focuses on developing production-grade physical design flows and methodologies for System LSI and Foundry technologies at Samsung Semiconductor India Research.
  • Candidates must possess deep expertise in EDA automation using Python, Tcl, or Perl to enhance PPA, runtime, and ease of use for design teams.
  • The position requires strong fundamentals in Static Timing Analysis including OCV/POCV derates, PVT corners, and ECO flows for complex convergence issues.

Matching Summary

The role focuses on developing production-grade physical design flows and methodologies for System LSI and Foundry technologies at Samsung Semiconductor India Research.

Skills & Requirements

Must-have

  • SoC Physical Design flow development
  • Python Tcl Perl UNIX scripting
  • Synopsys Cadence PnR signoff tools
  • STA constraints SDC timing debug
  • Low power UPF multi-voltage designs
  • ECO flows and DRC fixing

Nice-to-have

  • AI-driven optimization tools experience
  • Hierarchical STA chip-top integration
  • DTCO advanced node exposure
  • Formal verification LEC methodology
  • Training design teams on best practices

Key Requirements

  • 5 to 8 years of SoC Physical Design experience
  • B.Tech/B.E/M.Tech/M.E degree qualification
  • Expertise in Synopsys Fusion Compiler and PrimeTime
  • Experience with Cadence Innovus and Genus tools

Work Rights

Not specified

Tailored Resume

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