PERSOL SINGAPORE PTE. LTD. is seeking a Memory Layout Engineer for a 12-month contract in Singapore. The role involves implementing high-quality memory layouts, performing physical verifications, and collaborating with cross-functional teams to optimize designs
Job Summary
The role involves implementing high-quality memory layouts that meet designer specifications and project milestones.
Candidates must perform rigorous physical and reliability verifications including DRC, LVS, and ERC to ensure tape-out compliance.
The position requires close collaboration with multi-functional teams to optimize power, performance, and area.
Matching Summary
Match Score: 85
PERSOL SINGAPORE PTE. LTD. is seeking a Memory Layout Engineer for a 12-month contract in Singapore. The role involves implementing high-quality memory layouts, performing physical verifications, and collaborating with cross-functional teams to optimize designs.
Skills & Requirements
Must-have
Custom memory layout implementation SRAM ROM TCAM
Advanced finFET GAA process node experience
Physical verification DRC LVS ERC execution
Floor planning power mesh critical block placement
Synopsys Cadence layout editor proficiency
Nice-to-have
Script programming Python Tcl Perl C-shell
Cross-team communication and time management skills
Deep sub-micron and DFM issues understanding
Key Requirements
Bachelor's Degree in Electrical/Electronic/Computer Engineering
At least 5 years of direct custom memory layout experience