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Cadence is seeking a Sr Design Engineer for physical design in Seoul, South Korea, focusing on ASIC design implementation. The role involves responsibilities such as floor planning, power grid design, and ensuring successful tapeouts in low power and high-speed designs. Candidates should have a strong background in physical design methodologies and ASIC design flow, along with excellent communication skills.
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Job Summary
The role involves leading or participating in challenging physical design implementation projects for low power and high speed designs at the latest technology nodes.
Candidates will work closely with the RTL design team to ensure successful tapeouts while developing next-generation physical design methodologies.
The position requires a self-motivated individual capable of working independently on diverse technical tasks across the entire design flow.
Matching Summary
Match Score: 75
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Cadence is seeking a Sr Design Engineer for physical design in Seoul, South Korea, focusing on ASIC design implementation. The role involves responsibilities such as floor planning, power grid design, and ensuring successful tapeouts in low power and high-speed designs. Candidates should have a strong background in physical design methodologies and ASIC design flow, along with excellent communication skills.
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Skills & Requirements
Must-have
ASIC design flow experience
Hierarchical physical design strategies
Low power design methodologies
Static timing analysis and closure
EM/IR drop and crosstalk analysis
Physical verification DRC LVS Antenna
Nice-to-have
Next generation methodology development
Hands-on design verification skills
Strong English communication abilities
Team collaboration in tapeout process
Key Requirements
Solid knowledge of deep sub-micron technology issues
Experience with DFT and formal verification
Ability to assume responsibility for various technical tasks