R&D engineer position available in design and physical implementation of high-performance System-On-Chip ASICs
Job Summary
R&D engineer position available in design and physical implementation of high-performance System-On-Chip ASICs.
Utilize commercial and in-house EDA tools for the design and implementation of 500 ~ 800 million gate integrated circuits in 5nm/3nm/2nm process technologies.
Opportunity to participate in innovation, design flow and methodology development to address challenges of designing into deep submicron processes and state-of-the-art ASIC design for computing and networking products.
Matching Summary
R&D engineer position available in design and physical implementation of high-performance System-On-Chip ASICs.
Skills & Requirements
Must-have
physical design implementation
leading edge physical design EDA tools
resolve timing violations
5nm/3nm/2nm process technologies
deep submicron processes
Nice-to-have
technical support to customers
managing customer working relationship
innovation, design flow and methodology development
Key Requirements
7 years or more experience
Familiarity with VLSI design tools
Strong analytical problem-solving skills
Experience in Perl, Tcl & Python Scripting languages