Design Engineer

NXP Semiconductors

Bangalore, India
Soc design methodology
Rtl sign-off
Timing constraints
Leading design, micro-architecture and integration of the System on Chip (SOC) from initial specification till tape out and beyond

Job Summary

  • Leading design, micro-architecture and integration of the System on Chip (SOC) from initial specification till tape out and beyond.
  • Drive and implement best SoC design methodology /practices and scale it across different business lines.
  • Provide design support for any silicon related debugs of chips in post -silicon phase.

Matching Summary

Leading design, micro-architecture and integration of the System on Chip (SOC) from initial specification till tape out and beyond.

Skills & Requirements

Must-have

  • SOC design methodology
  • RTL sign-off
  • timing constraints
  • CDC/RDC analysis
  • micro-architecture integration

Nice-to-have

  • silicon debug support
  • cross-functional collaboration

Key Requirements

  • Experience with RTL, timing constraints, CDC, RDC
  • Work with verification, DFT, synthesis functions

Work Rights

Not specified

Tailored Resume

Cover Letter