Dft Intern - Asic Student - Israel - Etr

Cisco

Caesarea, Israel
Dft logic insertion
Gate level simulations
Timing checks
The DFT team focuses on logic design and verification tests to ensure chip functionality after manufacturing

Job Summary

  • The DFT team focuses on logic design and verification tests to ensure chip functionality after manufacturing.
  • The role involves inserting DFT logic and running ATPG for hardware testability.
  • Cisco offers a collaborative environment with opportunities for professional growth.

Matching Summary

The DFT team focuses on logic design and verification tests to ensure chip functionality after manufacturing.

Skills & Requirements

Must-have

  • DFT logic insertion
  • Gate Level Simulations
  • timing checks
  • DRC checks

Nice-to-have

  • friendly and social personality
  • ability to learn independently
  • team player with big challenges

Key Requirements

  • B.Sc or M.Sc Electrical/Computer Engineer student
  • average grades above 85
  • suitable for students finishing second or third year

Work Rights

Not specified

Tailored Resume

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