Principal Signal And Power Integrity Engineer

Astera Labs

San Jose, CA, United States
Base: $203,000 usd - $250,000 usd; bonus/equity: n...
On-site
High-speed si/pi design, simulation, and measurement
Em modeling of bga and connector structures
High-speed serdes channel simulation and equalization
Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions

Job Summary

  • Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions.
  • In this role, you will execute the SI planning, design, modeling, simulation, and lab validation with various system configurations.
  • We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences.

Matching Summary

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions.

Salary

Base: $203,000 USD - $250,000 USD; Bonus/Equity: Not specified; Benefits: Not specified

Skills & Requirements

Must-have

  • High-speed SI/PI design, simulation, and measurement
  • EM modeling of BGA and connector structures
  • High-speed SERDES channel simulation and equalization
  • PI simulations with Ansys/Cadence toolsets
  • Familiar with VNA, TDR, oscilloscopes
  • Working knowledge of PCB fabrication limits

Nice-to-have

  • Cross-functional design mentality
  • Self-starting and hands-on work ethic
  • Entrepreneurial, open-minded behavior

Key Requirements

  • 8+ years of experience supporting or developing complex SoC/silicon products
  • 8+ years of hands-on high-speed SI/PI design, simulation, and measurement experience
  • Familiar with SI and PI design challenges for PCIe Gen5/6 and/or 224/448G Ethernet PCB
  • 2D and 3D EM simulation experience
  • Familiar with industry standards such as PCI-SIG, and IEEE802.3
  • Authorized to work in the US and start immediately

Work Rights

Authorized to work in the US

Tailored Resume

Cover Letter