Platform Integration Engineer

Intel Retiree Medical Plan Trust

Santa Clara, California, United States
Base: $122,440.00-232,190.00 usd; bonus/equity: st...
Hybrid
Bachelor's degree in electrical engineering or computer science
4+ years hands-on experience in soc design
Experience with verilog/systemverilog design
Intel is seeking a Platform Integration Engineer for its Chassis Group in Santa Clara, California, focusing on the design and development of high-performance networks-on-chip for various SoCs. The role requires strong technical skills in SoC architecture, IP design, and collaboration across global teams

Job Summary

  • The role involves designing and developing high-performance networks-on-chip that meet SoC PPA requirements using chassis foundation library components.
  • Candidates must coordinate with the foundation IP development team to modify or create IP components according to specific SoC needs.
  • Intel offers a competitive total compensation package including stock bonuses, health benefits, retirement plans, and vacation time.

Matching Summary

Match Score: 85

Intel is seeking a Platform Integration Engineer for its Chassis Group in Santa Clara, California, focusing on the design and development of high-performance networks-on-chip for various SoCs. The role requires strong technical skills in SoC architecture, IP design, and collaboration across global teams.

Salary

Base: $122,440.00-232,190.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • Bachelor's degree in Electrical Engineering or Computer Science
  • 4+ years hands-on experience in SoC design
  • Experience with Verilog/SystemVerilog design
  • Knowledge of AMBA protocols (CHI, AXI, AHB, APB)
  • Experience with PCIe/CXL interfaces

Nice-to-have

  • Post Graduate Degree in related field
  • Microarchitecture and fabric IP design experience
  • Experience with Lint/CDC/RDC tools
  • Timing constraint development skills
  • Physical design constraints and floorplanning knowledge

Key Requirements

  • Bachelor's degree in Electrical Engineering, Computer Science, or related field
  • 4+ years of industry relevant job experience in SoC and/or IP design
  • US work authorization required for Santa Clara location

Work Rights

Not specified

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