Senior Analog Mixed Signal Circuit Design Engineer, SERDES

XILINX ASIA PACIFIC PTE. LTD.

Singapore
High speed analog design experience
Circuit design for wireline transceivers
7nm or below finfet process technology
The role focuses on planning, building, and executing verification for AMD's SERDES IP to ensure bug-free final designs

Job Summary

  • The role focuses on planning, building, and executing verification for AMD's SERDES IP to ensure bug-free final designs.
  • Candidates will be responsible for circuit design of critical wireline transceiver building blocks such as PLLs and front-ends.
  • The ideal candidate must possess a deep understanding of analog design and the ability to lead worldwide design review meetings.

Matching Summary

Match Score: 75

The role focuses on planning, building, and executing verification for AMD's SERDES IP to ensure bug-free final designs.

Skills & Requirements

Must-have

  • High speed analog design experience
  • Circuit design for wireline transceivers
  • 7nm or below FinFET process technology
  • Experience with ADC and PLL blocks
  • Silicon validation and evaluation skills

Nice-to-have

  • Leadership in global design review meetings
  • Ability to present technical findings
  • Deep understanding of serializer/deserializer blocks

Key Requirements

  • Bachelors/Masters/PhD in Electronic Engineering
  • Extensive experience with high speed analog design
  • Proficiency with latest process technologies like 7nm FinFET

Work Rights

Not specified

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