Senior Cpu Performance Architect

Intel Retiree Medical Plan Trust

Austin, Texas, United States
Base: $190,610.00-361,480.00 usd; bonus/equity: st...
Hybrid
Master's degree with 10+ years experience or phd with 6+ years
8+ years continuous work in cycle accurate c++ cpu simulators
Expertise in branch prediction, fetch/decode, rename/allocation domains
This role plays a pivotal part in shaping the future of Intel's cutting-edge CPU designs by defining architecture specifications that impact industry leadership

Job Summary

  • This role plays a pivotal part in shaping the future of Intel's cutting-edge CPU designs by defining architecture specifications that impact industry leadership.
  • Candidates will develop end-to-end CPU microarchitecture specifications, model performance characteristics, and resolve bottlenecks across diverse market segments.
  • The position offers a competitive total compensation package including stock bonuses and comprehensive benefit programs within a hybrid work model.

Matching Summary

This role plays a pivotal part in shaping the future of Intel's cutting-edge CPU designs by defining architecture specifications that impact industry leadership.

Salary

Base: $190,610.00-361,480.00 USD; Bonus/Equity: Stock bonuses included; Benefits: Health, retirement, and vacation programs

Skills & Requirements

Must-have

  • Master's degree with 10+ years experience or PhD with 6+ years
  • 8+ years continuous work in cycle accurate C++ CPU simulators
  • Expertise in branch prediction, fetch/decode, rename/allocation domains

Nice-to-have

  • Experience debugging microarchitecture and simulation issues
  • Ability to write assembly and craft tests for feature evaluation
  • Advanced skills in Object Oriented Programming and scripting languages

Key Requirements

  • Master's Degree with 10+ years experience or PhD with 6+ years
  • 8+ years continuous work within cycle accurate C++ CPU performance simulators
  • Position of Trust requiring extended background investigation

Work Rights

Not specified

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