System Modelling Engineer

Intel Retiree Medical Plan Trust

Bangalore, India
Bachelor's degree in electrical engineering
12+ years relevant experience
End-to-end behavioral modeling
The role involves driving innovative architectures and algorithms for the next generation of System-on-Chip independent analog and mixed signal IPs

Job Summary

  • The role involves driving innovative architectures and algorithms for the next generation of System-on-Chip independent analog and mixed signal IPs.
  • Candidates will develop end-to-end behavioral models for 224Gbps SerDes PHYs to evaluate BER, eye margins, and link robustness.
  • This position requires close collaboration with circuit designers, DSP teams, and package engineers to support silicon bringup and debug.

Matching Summary

The role involves driving innovative architectures and algorithms for the next generation of System-on-Chip independent analog and mixed signal IPs.

Skills & Requirements

Must-have

  • Bachelor's degree in Electrical Engineering
  • 12+ years relevant experience
  • End-to-end behavioral modeling
  • 224Gbps SerDes PHY architecture
  • TX/RX block design expertise
  • PAM4 signaling optimization
  • Jitter decomposition analysis

Nice-to-have

  • Strong leadership skills
  • Cross-functional collaboration
  • Innovative problem-solving abilities
  • Effective communication with stakeholders
  • Passion for advancing technology

Key Requirements

  • Bachelor's degree in EE or related field
  • 12+ years of relevant experience
  • Master's degree with 8+ years experience
  • PhD with 4+ years experience
  • Proficiency in analog circuit design

Work Rights

Not specified

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