Sr Director Analyst- Semiconductor Foundry And Advanced Packaging Technology/markets

Gartner UK

Base: 172,000 usd - 202,500 usd; bonus/equity: ann...
Hybrid
12-18 years in foundry or fabless supply planning
Deep understanding of tsmc samsung intel operations
Expertise in cowos 2.5d 3d advanced packaging
Gartner UK is seeking a Senior Director Analyst specializing in semiconductor foundry and advanced packaging technology to provide insights and strategic guidance to clients in the semiconductor and IT sectors. The ideal candidate will have extensive experience in foundry operations and advanced packaging, along with strong analytical and presentation skills

Job Summary

  • This role requires owning the global narrative on AI-driven foundry capacity formation and translating wafer capacity into deployable compute supply for hyperscalers and investors.
  • The position involves building point-of-view on advanced packaging constraints like CoWoS and substrate shortages that determine AI accelerator throughput and deployment timing.
  • Gartner offers world-class benefits including a 401k match up to $7,200 per year and a hybrid work environment designed for professional growth.

Matching Summary

Match Score: 85

Gartner UK is seeking a Senior Director Analyst specializing in semiconductor foundry and advanced packaging technology to provide insights and strategic guidance to clients in the semiconductor and IT sectors. The ideal candidate will have extensive experience in foundry operations and advanced packaging, along with strong analytical and presentation skills.

Salary

Base: 172,000 USD - 202,500 USD; Bonus/Equity: Annual bonus plan or uncapped sales incentive plan; Benefits: Generous PTO, 401k match up to $7,200, company stock discount

Skills & Requirements

Must-have

  • 12-18 years in foundry or fabless supply planning
  • Deep understanding of TSMC Samsung Intel operations
  • Expertise in CoWoS 2.5D 3D advanced packaging
  • Ability to convert technical signals into market insights
  • Experience with wafer starts yield ramp and utilization

Nice-to-have

  • Exposure to HBM integration and chiplet technologies
  • Financial modeling or investor-facing experience
  • Prior experience speaking at industry events
  • Experience interacting with hyperscaler customers

Key Requirements

  • 12-18+ years of relevant industry experience
  • Deep expertise in foundry fab economics and node transitions
  • Strong grasp of yield utilization and ramp curves

Work Rights

Not specified

Tailored Resume

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