Lead Engineer, Silicon And Software Integration, Google Cloud

Google

Sunnyvale, CA, United States
Base: $192,000-$278,000; bonus/equity: included; b...
Not specified (assumed to be hybrid or onsite based on industry standards).
Asic development and validation
Hardware/software integration expertise
Tpu architecture knowledge
Google is seeking a Lead Engineer for Silicon and Software Integration within its Google Cloud division, focusing on advancing TPU technology for AI/ML applications. The role involves leading cross-functional efforts in hardware and software integration while ensuring performance and functional validation across various phases of silicon development

Job Summary

  • This role offers the opportunity to drive cutting-edge TPU technology that powers Google's most demanding AI/ML applications.
  • You will own cross-functional work streams focused on end-to-end HW/SW integration and validation to demonstrate functionality and performance.
  • The position involves serving as a key bridge between specification, design, verification, compiler, and performance teams with technical depth across ML compute IP.

Matching Summary

Match Score: 85

Google is seeking a Lead Engineer for Silicon and Software Integration within its Google Cloud division, focusing on advancing TPU technology for AI/ML applications. The role involves leading cross-functional efforts in hardware and software integration while ensuring performance and functional validation across various phases of silicon development.

Salary

Base: $192,000-$278,000; Bonus/Equity: Included; Benefits: Not specified

Skills & Requirements

Must-have

  • ASIC development and validation
  • Hardware/software integration expertise
  • TPU architecture knowledge
  • RTL simulation and emulation
  • FPGA environment experience
  • ML compute feature bring-up

Nice-to-have

  • Cross-functional leadership skills
  • Compiler team collaboration
  • Performance optimization strategies
  • Innovation in chip development
  • Strategic planning capabilities

Key Requirements

  • Experience in ASIC development
  • Expertise in digital design verification
  • Knowledge of TPU architecture
  • Proficiency in hardware-software co-simulation
  • Background in ML compute systems

Work Rights

Not specified

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