Base: $183,800.00 - $263,600.00 (varies by locatio...
Onsite
Verilog/system verilog programming experience
10+ years asic design experience
Setup and hold timing violation resolution
Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks
Job Summary
Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks.
The role involves implementing Verilog RTL, defining micro-architecture specifications, and mentoring junior engineers on project tasks.
Employees are eligible for annual bonuses, restricted stock units, and comprehensive benefits including medical, dental, vision, and flexible vacation time.
Matching Summary
Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks.
Salary
Base: $183,800.00 - $263,600.00 (varies by location); Bonus/Equity: Annual bonuses and RSUs available; Benefits: Medical, dental, vision, 401(k), paid leave
Skills & Requirements
Must-have
Verilog/System Verilog programming experience
10+ years ASIC Design experience
Setup and hold timing violation resolution
Interactive and waveform debug experience
Micro-architecture specification reviews
Nice-to-have
Python, Perl, TCL scripting experience
CDC and Spyglass static analysis knowledge
Mentoring junior engineers
Buffering and scheduling architectures
Collaboration with physical design team
Key Requirements
Bachelor's degree in Electrical or Computer engineering with 10+ years experience
Master's degree in Electrical or Computer engineering with 8+ years experience
Experience resolving setup and hold timing violations