Senior Soc Integration Engineer

Altera Corporation

Penang, Malaysia
Physical design flow
Eda tools
Physical design signoff flow
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing

Job Summary

  • Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Possesses hands on expertise in various process nodes full chip physical integration, system level place and route and system level verification signoff.

Matching Summary

Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.

Skills & Requirements

Must-have

  • physical design flow
  • EDA tools
  • physical design signoff flow
  • STA flow
  • LEC flow
  • ERC flow
  • DRC flow

Nice-to-have

  • low power design methodologies
  • power intent UPF specifications
  • mentoring junior team members
  • analytical problem solving skills
  • team working skills

Key Requirements

  • 5+ years of relevant experience
  • multiple tape-out experience
  • deep submicron process nodes
  • scripting languages Perl, TCL, Python
  • hardware description languages VHDL and Verilog

Work Rights

Not specified

Tailored Resume

Cover Letter