Asic Design Engineer - New College Grad 2026

Invidia

Westford, MA, United States
Base: 100,000 usd - 166,750 usd for level 1; 116,0...
Not specified
Verilog or system verilog expertise
High speed (>1ghz) design experience
Low power design methodologies
NVIDIA is seeking a New College Graduate for an ASIC Design Engineer position in Westford, MA, focusing on the development of the NVLink protocol. The ideal candidate will have a background in electrical engineering, computer science, or computer engineering, along with proficiency in Verilog or System Verilog

Job Summary

  • NVIDIA is a pioneer in visual and AI computing with a focus on GPU technology that simulates human intelligence.
  • The NVLink ASIC Design team works on next generation high speed chip-to-chip communication to meet datacenter marketplace needs.
  • Employees receive competitive base salary, equity, and benefits while working in a diverse and inclusive environment.

Matching Summary

Match Score: 85

NVIDIA is seeking a New College Graduate for an ASIC Design Engineer position in Westford, MA, focusing on the development of the NVLink protocol. The ideal candidate will have a background in electrical engineering, computer science, or computer engineering, along with proficiency in Verilog or System Verilog.

Salary

Base: 100,000 USD - 166,750 USD for Level 1; 116,000 USD - 189,750 USD for Level 2; Bonus/Equity: Eligible for equity; Benefits: Eligible for benefits

Skills & Requirements

Must-have

  • Verilog or System Verilog expertise
  • High speed (>1GHz) design experience
  • Low power design methodologies
  • RTL implementation and debugging
  • Synthesis and timing closure
  • Collaboration and communication skills

Nice-to-have

  • Internship experience in ASIC design
  • Project experience with System Verilog
  • Background with high speed design methodologies
  • Creative and autonomous work style
  • Experience with power and noise analysis

Key Requirements

  • Bachelor's Degree in EE, CS or CE
  • Project or design experience with high speed design
  • Project or design experience with low power methodologies

Work Rights

Not specified

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