Principal Analog/mixed Signal Cad Engineer

Marvell

Santa Clara, CA, US
Base: $150,680 - $225,700 py; bonus/equity: not sp...
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10-15 years professional experience
Advanced finfet process technology
Cadence ade ams designer or spectre
** Marvell is seeking a Principal Analog/Mixed-Signal CAD Engineer to drive the development and maintenance of design automation infrastructure for cutting-edge semiconductor projects in Santa Clara, CA. The role requires extensive experience in analog and mixed-signal design flows and offers a collaborative environment that significantly impacts engineering productivity and innovation. **

Job Summary

  • This role involves shaping the next generation of design automation infrastructure to support cutting-edge analog and mixed-signal IC development across Marvell's global teams.
  • You will architect and maintain simulation environments for advanced CMOS FinFET and BiCMOS technologies while partnering with foundry partners and EDA vendors.
  • The position offers a culture of innovation in Santa Clara where engineers push boundaries on performance, efficiency, and integration for AI and cloud infrastructure silicon.

Matching Summary

Match Score: 75

** Marvell is seeking a Principal Analog/Mixed-Signal CAD Engineer to drive the development and maintenance of design automation infrastructure for cutting-edge semiconductor projects in Santa Clara, CA. The role requires extensive experience in analog and mixed-signal design flows and offers a collaborative environment that significantly impacts engineering productivity and innovation. **

Salary

Base: $150,680 - $225,700 per annum; Bonus/Equity: Not specified; Benefits: Employee stock purchase plan, family support programs, mental health resources

Skills & Requirements

Must-have

  • 10-15 years professional experience
  • Advanced FinFET process technology
  • Cadence ADE AMS Designer or Spectre
  • Synopsys PrimeSim AFS experience
  • Device modeling and TCAD collaboration
  • Python TCL Perl SKILL scripting

Nice-to-have

  • Silicon photonics design flow knowledge
  • Custom CAD automation framework development
  • Strong cross-functional collaboration skills
  • PDK integration and CDF customization
  • Influence company-wide CAD strategy

Key Requirements

  • BSEE with 10-15 years experience or MS/PhD with 5-10 years
  • Must be eligible for US export control laws review
  • Onsite presence required five days per week in Santa Clara

Work Rights

Eligible to access export-controlled information as defined under applicable law

Tailored Resume

Cover Letter