We are seeking an experienced Design Verification Engineer with 6+ years of expertise for execution of complex SoCs
Job Summary
We are seeking an experienced Design Verification Engineer with 6+ years of expertise for execution of complex SoCs.
The role involves developing and owning SoC-level and/or IP-level verification suites with coverage goals and driving DV closure on diverse IPs and subsystems.
The candidate will collaborate with design teams, mentor junior members, and improve verification flows for maximum reuse and efficiency.
Matching Summary
We are seeking an experienced Design Verification Engineer with 6+ years of expertise for execution of complex SoCs.
Skills & Requirements
Must-have
ARM-based microcontrollers expertise
SoC-level verification experience
UVM based verification environment
Verilog and SystemVerilog proficiency
Constrained-random verification
EDA tools Synopsys VCS and Cadence Xcelium
Nice-to-have
Low-power design verification
Gate-level and power-aware simulations
Knowledge of multiple interfaces
Experience with security IPs
Mentoring junior team members
Strong communication skills
Fast-paced environment adaptability
Key Requirements
5-12 years SoC/IP verification experience
Participation in successful SoC tape-outs
Bachelors or Master’s in Microelectronics or related fields