Asic Engineer - Sdc

Cisco UK

San Jose, California, United States
Base: $165,000.00 to $241,400.00; bonus/equity: in...
Onsite
Bachelor's degree in electrical or computer engineering
7+ years of asic experience
Expertise in static timing analysis (sta)
Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks

Job Summary

  • Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks.
  • Own and develop full-chip timing constraints (SDC) across functional and test modes for complex networking SoCs.
  • The role offers a unique blend of large organization resources and startup culture with onsite amenities including a gym and café.

Matching Summary

Join the Cisco Silicon One team to develop a unified silicon architecture for web scale and service provider networks.

Salary

Base: $165,000.00 to $241,400.00; Bonus/Equity: Incentive compensation and restricted stock units available; Benefits: Medical, dental, vision, 401(k), paid time off

Skills & Requirements

Must-have

  • Bachelor's degree in Electrical or Computer Engineering
  • 7+ years of ASIC experience
  • Expertise in Static Timing Analysis (STA)
  • Experience with Synopsys PrimeTime or Cadence Tempus
  • Developing block-level and full-chip SDC constraints

Nice-to-have

  • Experience with large SoCs multiple clock domains
  • Proficiency in Python, Perl, TCL scripting
  • Expertise with constraint analysis tools like TCM or CCD
  • Ability to analyze RTL structures for improvements
  • Experience with CDC analysis tools like SpyGlass

Key Requirements

  • Bachelor's degree in EE/CE with 7+ years experience
  • Master's degree in EE/CE with 4+ years experience
  • PhD in EE/CE with 1+ year experience
  • Onsite presence required 4 days per week in San Jose, CA

Work Rights

Not specified

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