Senior Asic Rtl Integration Engineer, Silicon

Google

Bengaluru, India
Not specified
Rtl coding and simulation debug
Lint cdc formal verification checks
Synthesis timing power closure
Google is seeking a Senior ASIC RTL Integration Engineer to join their team in Bengaluru, India, focusing on developing custom silicon solutions for Google's consumer products. The role involves defining design documents, performing RTL coding, and collaborating with multi-disciplinary teams to innovate hardware experiences

Job Summary

  • This role involves defining block-level design documents including interface protocols and transaction flows for custom silicon solutions.
  • The engineer will perform RTL coding, simulation debugging, and various verification checks such as Lint, CDC, and Formal Verification.
  • Candidates must participate in synthesis, timing closure, and FPGA or silicon bring-up while collaborating with multi-site teams.

Matching Summary

Match Score: 85

Google is seeking a Senior ASIC RTL Integration Engineer to join their team in Bengaluru, India, focusing on developing custom silicon solutions for Google's consumer products. The role involves defining design documents, performing RTL coding, and collaborating with multi-disciplinary teams to innovate hardware experiences.

Skills & Requirements

Must-have

  • RTL coding and simulation debug
  • Lint CDC Formal Verification checks
  • Synthesis timing power closure
  • FPGA silicon bring-up experience
  • Block-level design documentation

Nice-to-have

  • Multi-disciplined team collaboration
  • Multi-site team communication
  • Custom silicon solution development
  • High performance hardware integration

Key Requirements

  • Experience with Unified Power Format (UPF)
  • Proficiency in ASIC-level verification test plans
  • Background in hardware design and integration

Work Rights

Not specified

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