Senior Dft Engineer - Lpu

Nvidia Corporation

Base: $136,000 - $264,500 usd depending on level; ...
Not specified
5+ years dft experience for high-performance asics
Scan, mbist, and jtag debug structure implementation
Atpg test vector generation and yield estimation
NVIDIA is seeking a Senior DFT Engineer to develop and implement Design for Test (DFT) architecture for next-generation AI chips. The ideal candidate will have extensive experience in DFT methodologies and tools, along with strong coding skills and a collaborative mindset

Job Summary

  • NVIDIA is seeking a Senior DFT Engineer to develop and implement powerful Design for Test architecture for next-gen AI Chips.
  • The role involves defining SCAN, MBIST, and JTAG debug structures while driving the creation of ATPG and MBIST test vectors.
  • Candidates will work closely with post-silicon teams to ensure flawless bringup and collaborate on AI-driven optimizations.

Matching Summary

Match Score: 85

NVIDIA is seeking a Senior DFT Engineer to develop and implement Design for Test (DFT) architecture for next-generation AI chips. The ideal candidate will have extensive experience in DFT methodologies and tools, along with strong coding skills and a collaborative mindset.

Salary

Base: $136,000 - $264,500 USD depending on level; Equity: Eligible; Benefits: Comprehensive package included

Skills & Requirements

Must-have

  • 5+ years DFT experience for high-performance ASICs
  • SCAN, MBIST, and JTAG debug structure implementation
  • ATPG test vector generation and yield estimation
  • Tcl and Python coding skills
  • RTL to GDS methodologies and formal equivalence
  • Post-silicon debugging on ATE equipment

Nice-to-have

  • AI-driven DFT optimization techniques
  • UDFMs like Cell Aware and Small Delay Defect
  • Collaboration with cross-functional teams
  • Innovative problem-solving in diverse environment

Key Requirements

  • Bachelor's or M.S. in Computer/Electrical Engineering
  • 5+ years industry experience in DFT for high-performance ASICs
  • Experience with IEEE 1500 standard and LBIST
  • Solid understanding of RTL to GDS flows

Work Rights

Not specified

Tailored Resume

Cover Letter