Senior Physical Design Engineer

Tenstorrent

Tokyo, Japan
Not specified; not specified; highly competitive c...
On-site
10+ years soc/asic physical design experience
Synopsys/cadence industry-standard tools proficiency
Tcl and python scripting capabilities
Tenstorrent is seeking a Senior Physical Design Engineer to join their team in Tokyo, Japan, focusing on chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs. The ideal candidate should have extensive experience in SoC/ASIC/GPU/CPU physical design, strong collaboration skills, and proficiency in relevant industry-standard tools

Job Summary

  • Tenstorrent is seeking a senior physical design engineer to lead chiplet and chip-top implementation for their AIDC Yayoi project using cutting-edge AI technology.
  • The role requires extensive experience in SoC physical design on taped-out designs, utilizing industry-standard tools like Synopsys or Cadence.
  • Candidates will work in a hybrid capacity based in Tokyo, Japan, collaborating with global teams across the USA and other regions.

Matching Summary

Match Score: 85

Tenstorrent is seeking a Senior Physical Design Engineer to join their team in Tokyo, Japan, focusing on chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs. The ideal candidate should have extensive experience in SoC/ASIC/GPU/CPU physical design, strong collaboration skills, and proficiency in relevant industry-standard tools.

Salary

Not specified; Not specified; Highly competitive compensation package and benefits

Skills & Requirements

Must-have

  • 10+ years SoC/ASIC physical design experience
  • Synopsys/Cadence industry-standard tools proficiency
  • TCL and Python scripting capabilities
  • Chiplet-level and chip-top implementation skills
  • Advanced node (5nm and below) design expertise

Nice-to-have

  • Strong collaboration and mentorship abilities
  • Data-driven project planning and risk management
  • Experience with global stakeholder communication
  • Passion for solving hard technical problems
  • Deep desire to build best AI platform possible

Key Requirements

  • Bachelor's, Master's, or PhD in Electrical Engineering
  • 10+ years of experience in SoC/ASIC/GPU/CPU physical design
  • Eligibility for U.S. export license compliance

Work Rights

Must be eligible for U.S. export license (not EAR Country Groups D:1, E1, or E2)

Tailored Resume

Cover Letter