Lead Dft Engineer

NXP USA INC.

Pune, India
On-site
Dft architecture design
Scan insertion and atpg
Memory and logic bist
NXP USA Inc. is seeking a Lead DFT Engineer in Pune, India, responsible for designing and implementing DFT architectures for complex SoCs. The role requires strong expertise in DFT methodologies and collaboration with various engineering teams to ensure high-quality silicon production

Job Summary

  • Responsible for designing, implementing, and verifying DFT architectures for complex SoCs.
  • Collaborate with RTL, physical design, and verification teams to ensure robust testability and high-quality silicon.
  • Work with ATE teams for test program development and silicon bring-up, optimizing test coverage, pattern count, and test time.

Matching Summary

Match Score: 85

NXP USA Inc. is seeking a Lead DFT Engineer in Pune, India, responsible for designing and implementing DFT architectures for complex SoCs. The role requires strong expertise in DFT methodologies and collaboration with various engineering teams to ensure high-quality silicon production.

Skills & Requirements

Must-have

  • DFT architecture design
  • Scan insertion and ATPG
  • Memory and logic BIST
  • Low-power DFT (UPF/CPF)
  • Fault models knowledge
  • Silicon debug and ATE bring-up

Nice-to-have

  • SoC level DFT experience
  • High-speed interfaces DFT
  • Mixed-signal DFT exposure
  • Strong problem-solving skills
  • Excellent communication skills

Key Requirements

  • Bachelor’s or Master’s in Electrical/Electronics Engineering
  • Strong expertise in DFT methodologies
  • Hands-on experience with ATPG tools
  • Familiarity with physical design constraints

Work Rights

Not specified

Tailored Resume

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