Floorplan partition and assembly for hierarchical chips
PERSOL SINGAPORE PTE. LTD. is seeking a Technical Manager for IC Physical Design with extensive experience in advanced process chips. The ideal candidate will have strong leadership skills, technical expertise, and a proven track record in managing complex chip design projects
Job Summary
Lead the IC physical design of world-leading advanced process chips ranging from 6nm to 3nm and below.
Serve as a block coordinator managing synthesis, place-and-route, and physical verification tasks for over ten blocks.
Coordinate with frontend and signoff teams to ensure timely delivery of SoC PD tasks and successful tapeout.
Matching Summary
Match Score: 85
PERSOL SINGAPORE PTE. LTD. is seeking a Technical Manager for IC Physical Design with extensive experience in advanced process chips. The ideal candidate will have strong leadership skills, technical expertise, and a proven track record in managing complex chip design projects.
Skills & Requirements
Must-have
6nm/4nm/3nm IC physical design experience
Block coordinator role for Synthesis/APR/PV
Floorplan partition and assembly for hierarchical chips