Lead Ate Test Development Engineer - Lpu

Nvidia Corporation

Base: 196,000 usd - 310,500 usd (level 5); 232,000...
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Ate test development
Advantest 93k ate platform
Smartest 7 and 8
** NVIDIA is seeking a Lead ATE Test Development Engineer to join its LPU team, focused on developing and implementing ATE test strategies for LPU products. The ideal candidate will have extensive experience in IC design and ATE testing, with a strong emphasis on collaboration and innovation. **

Job Summary

  • Serve as the lead for defining, developing, implementing and supporting ATE test development, including defining test programs, driving test hardware development, leading bring up of new silicon, characterization and enabling production release of our latest LPU product.
  • Work closely with the SLT and system validation teams to understand how failures at the system level can be replicated on ATE to implement critical tests and/or test conditions on ATE.
  • NVIDIA offers highly competitive salaries and a comprehensive benefits package, with base salary ranges of 196,000 USD - 310,500 USD for Level 5, and 232,000 USD - 368,000 USD for Level 6.

Matching Summary

Match Score: 75

** NVIDIA is seeking a Lead ATE Test Development Engineer to join its LPU team, focused on developing and implementing ATE test strategies for LPU products. The ideal candidate will have extensive experience in IC design and ATE testing, with a strong emphasis on collaboration and innovation. **

Salary

Base: 196,000 USD - 310,500 USD (Level 5); 232,000 USD - 368,000 USD (Level 6); Bonus/Equity: Not specified; Benefits: Comprehensive benefits package

Skills & Requirements

Must-have

  • ATE test development
  • Advantest 93K ATE platform
  • SmarTest 7 and 8
  • debug product failures
  • streamlining test program development

Nice-to-have

  • Signal and Power integrity hardware design
  • system level testing/validation exposure
  • yield analysis
  • vmin/fmax characterization
  • defect analysis

Key Requirements

  • Bachelor Degree or higher in Electrical Engineering/Computer Engineering (or equivalent experience)
  • 12+ years of relevant experience in IC Design, application or ATE testing of VLSI
  • Understanding of DFT insertion techniques

Work Rights

Not specified

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