This role involves designing FPGA RTL systems and closing timing for advanced medical equipment to help alleviate pain and restore health
Job Summary
This role involves designing FPGA RTL systems and closing timing for advanced medical equipment to help alleviate pain and restore health.
Candidates will work with verification engineers to test designs and collect requirements while potentially mentoring colleagues or managing projects.
Medtronic offers a competitive salary range of $111,200.00 - $166,800.00 along with comprehensive benefits including health insurance and 401(k) matching.
Matching Summary
This role involves designing FPGA RTL systems and closing timing for advanced medical equipment to help alleviate pain and restore health.
Salary
Base: $111,200.00 - $166,800.00; Bonus/Equity: Eligible for Medtronic Incentive Plan (MIP); Benefits: Health, dental, vision, 401(k), PTO, tuition assistance
Skills & Requirements
Must-have
FPGA RTL design experience
Timing closure for advanced systems
Hardware prototype debugging
SOC product requirements analysis
Verification engineer collaboration
Nice-to-have
UVM verification methodology familiarity
Mentoring lower level specialists
Cross-platform IP packaging skills
Process improvement initiatives
Key Requirements
Bachelor's degree with 4 years experience OR Master's with 2 years