Soc Design Verification Engineer

Intel Retiree Medical Plan Trust

Bangalore, India
Hybrid
System verilog, ovm and uvm
Test bench bring-up at soc
Test plan development experience
The team is committed to strategically penetrating the AI market by delivering disruptive and transformative solutions

Job Summary

  • The team is committed to strategically penetrating the AI market by delivering disruptive and transformative solutions.
  • Your focus will be on leveraging technology innovation and incubation to drive commercial success, ensuring that advancements create significant value.
  • The team is dedicated to driving the software-defined transformation of the world's networks profitably, setting new standards for efficiency and connectivity.

Matching Summary

The team is committed to strategically penetrating the AI market by delivering disruptive and transformative solutions.

Skills & Requirements

Must-have

  • System Verilog, OVM and UVM
  • Test Bench bring-up at SoC
  • Test Plan development experience
  • Enabling regressions
  • simulation and emulation environments
  • RTL Debugging module level or soc level

Nice-to-have

  • Design for Debug (DFD) component
  • strategic market penetration
  • technology innovation and incubation
  • software-defined transformation

Key Requirements

  • 4 to 9 years of experience
  • Bachelor's degree in electrical engineering or computer engineering
  • Master's degree in electrical engineering or computer engineering
  • 3+ years of experience in 5 or more areas
  • Strong CPU/GPU architecture understanding

Work Rights

Not specified

Tailored Resume

Cover Letter