Senior Analog Validation/characterization Engineer

NXP

San Jose, CA, USA
Base: $166,200 to $228,500 annually; bonus/equity:...
Behavioral modeling in systemverilog
Hands-on validation of high-speed transceivers
Experience with cadence virtuoso
This role bridges the gap between pre-silicon design and post-silicon reality

Job Summary

  • This role bridges the gap between pre-silicon design and post-silicon reality.
  • You will spend roughly 50% of your time developing behavioral models and 50% in lab validation.
  • NXP offers competitive benefits including health, dental, and vision insurance.

Matching Summary

This role bridges the gap between pre-silicon design and post-silicon reality.

Salary

Base: $166,200 to $228,500 annually; Bonus/Equity: Not specified; Benefits: Health, dental, and vision insurance; 401(k), paid leave

Skills & Requirements

Must-have

  • Behavioral modeling in SystemVerilog
  • Hands-on validation of high-speed transceivers
  • Experience with Cadence Virtuoso

Nice-to-have

  • Familiarity with high-speed serial standards
  • Understanding of signal integrity concepts
  • Experience in structured Product Development Process

Key Requirements

  • BSEE or MSEE with 3+ years of experience
  • Proficiency in SystemVerilog or Verilog-A
  • Strong Python skills for automation

Work Rights

Not specified

Tailored Resume

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