The role involves performing SRAM memory layout development and physical verification activities for complex designs in advanced CMOS processes
Job Summary
The role involves performing SRAM memory layout development and physical verification activities for complex designs in advanced CMOS processes.
Engineers will work on cutting-edge technologies including System LSI, Memory, Foundry, and Mobile SoCs at one of Samsung's largest R&D centers outside Korea.
Candidates must possess a strong understanding of layout fundamentals such as IR-drop, parasitic analysis, matching, and shielding to ensure high performance and reliability.
Matching Summary
The role involves performing SRAM memory layout development and physical verification activities for complex designs in advanced CMOS processes.