Principal Design Verification Engineer

NXP USA INC.

Pune, India
On-site
Systemverilog/uvm verification environments
Verification planning and execution
Constrained-random and directed testing
NXP USA INC. is seeking a Principal Design Verification Engineer for their Pune, India office, focusing on leading verification efforts for complex semiconductor designs. The role requires extensive experience in ASIC verification methodologies, particularly with SystemVerilog and UVM, and involves collaboration across cross-functional teams

Job Summary

  • Lead verification efforts for complex IPs or sub-systems, contributing to SoC-level verification strategy.
  • Design, develop, and maintain SystemVerilog/UVM-based verification environments, including agents, scoreboards, monitors, checkers, assertions, and functional coverage.
  • Debug complex RTL and gate-level issues, working closely with design and architecture teams to root-cause functional, timing, and power-related problems.

Matching Summary

Match Score: 85

NXP USA INC. is seeking a Principal Design Verification Engineer for their Pune, India office, focusing on leading verification efforts for complex semiconductor designs. The role requires extensive experience in ASIC verification methodologies, particularly with SystemVerilog and UVM, and involves collaboration across cross-functional teams.

Skills & Requirements

Must-have

  • SystemVerilog/UVM verification environments
  • Verification planning and execution
  • Constrained-random and directed testing
  • Functional, code, and assertion coverage
  • Low-power verification using UPF/CPF
  • C/C++ test development for HW/FW
  • Scripting languages (Python/Perl)

Nice-to-have

  • Collaborative mindset
  • Technical guidance and code reviews
  • Influencing technical decisions

Key Requirements

  • 10-12 years of industry experience
  • Strong track record of block or sub-system verification ownership
  • Experience contributing to multiple successful tape-outs
  • Advanced proficiency in SystemVerilog and UVM
  • Experience with C/C++-based test development
  • Familiarity with Git, Jira, and Confluence

Work Rights

Not specified

Tailored Resume

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