Design Engineer Ii

Cadence

Montreal, Quebec, Canada
Base: 73,500.00 - 136,500.00 cad annual; bonus/equ...
Bachelor of science in ee/cpe/csc
Systemverilog assertions (svas)
Metric driven verification understanding
The role involves verifying digital RTL and developing reusable verification components for industry-standard protocols

Job Summary

  • The role involves verifying digital RTL and developing reusable verification components for industry-standard protocols.
  • Candidates must demonstrate excellent command of fundamental logic principles and strong problem-solving skills.
  • The position offers competitive compensation including bonus, equity, and comprehensive benefits like RRSP and health coverage.

Matching Summary

The role involves verifying digital RTL and developing reusable verification components for industry-standard protocols.

Salary

Base: 73,500.00 - 136,500.00 CAD Annual; Bonus/Equity: Eligible for incentive compensation; Benefits: RRSP, TFSA, Health, Dental, Vision, Life Insurance

Skills & Requirements

Must-have

  • Bachelor of Science in EE/CPE/CSC
  • SystemVerilog Assertions (SVAs)
  • Metric Driven Verification understanding
  • Universal Verification Methodologies (UVM)
  • Functional coverage and checks creation

Nice-to-have

  • Master of Science in EE/CPE/CSC
  • Scripting languages Python Perl Ruby
  • Standard Protocol knowledge PCIe USB SATA
  • Formal Verification Technologies exposure
  • Low Power verification experience CPF UPF

Key Requirements

  • Bachelor degree in Electrical Engineering or Computer Science
  • Understanding of digital design flow
  • Willingness to work full time in Montreal office

Work Rights

Not specified

Tailored Resume

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