Altera Digital Health is seeking a Front End ASIC RTL/Logic Design Engineer to develop logic design and RTL coding for integration in full chip designs. The ideal candidate should possess strong technical skills in electronics engineering, particularly in RTL coding and verification processes
Job Summary
The role involves developing logic design and RTL coding for IP blocks required for full chip designs.
Candidates must apply strategies to optimize logic for power, performance, area, and timing goals.
The position requires supporting SoC customers to ensure high-quality integration and verification of the IP block.
Matching Summary
Match Score: 85
Altera Digital Health is seeking a Front End ASIC RTL/Logic Design Engineer to develop logic design and RTL coding for integration in full chip designs. The ideal candidate should possess strong technical skills in electronics engineering, particularly in RTL coding and verification processes.
Skills & Requirements
Must-have
RTL coding using HDL languages
Logic simulation and debug environments
Power performance area timing optimization
Verification plan review and implementation
Nice-to-have
Strong communication and leadership skills
Scripting knowledge desirable
Problem solving and analytical skills
Key Requirements
BS/MS or PhD in Electronics Engineering
Proficiency with Spyglass Synthesis STA UPF UVM Spice DFT