You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization
Job Summary
You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
Work closely with various teams such as physical design, RTL, DFT, tool/flow owners, and EDA vendors to improve physical design methodologies.
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
Matching Summary
You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
Skills & Requirements
Must-have
RTL to GDS implementation flow
hierarchical floor planning
place and route
timing closure
power integrity analysis
physical verification
equivalence checks
performance and die size optimization
CTS strategies
STA setup and convergence
Timing ECO Implementation
automation scripts within STA tools
debugging implementation issues
Cadence Innovus
Synopsys FC
Synopsys DC/FC
Primetime-DMSA
TCL scripting
Perl scripting
Synopsys Formality
Cadence LEC
Apache Redhawk
Synopsys ICV
Mentor Calibre
Nice-to-have
creative solutions
evaluate timing methodologies/tools
Python scripting
Design for Yield and Manufacturability
multi-Vt strategies
Key Requirements
6+ years of related work experience
Bachelor's or Master’s Degree in Electrical or Computer Engineering