Senior Layout Design Engineer

Intel

Guadalajara, Mexico
Hybrid
Analog and mixed-signal layouts
Leading-edge process nodes
Cadence virtuoso
As a Senior Layout Design Engineer, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes

Job Summary

  • As a Senior Layout Design Engineer, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes.
  • This role requires a blend of artistic precision in manual layout and a strategic mindset to drive CAD automation and methodology improvements.
  • You will partner with Technology Development (TD), Circuit Design, and Packaging teams to negotiate layout tradeoffs and define IP requirements for next-generation nodes.

Matching Summary

As a Senior Layout Design Engineer, you will play a pivotal role in delivering best-in-class IO IPs on leading-edge process nodes.

Skills & Requirements

Must-have

  • analog and mixed-signal layouts
  • leading-edge process nodes
  • Cadence Virtuoso
  • Synopsys
  • Mentor Calibre
  • SKILL, Python, or Perl scripting

Nice-to-have

  • technical guidance to junior engineers
  • cross-functional collaboration
  • innovation-driven mindset

Key Requirements

  • Bachelor's degree in EE or related
  • 6+ years of experience
  • Advance English level
  • Unrestricted permanent right to work in Mexico

Work Rights

Unrestricted permanent right to work in Mexico

Tailored Resume

Cover Letter