Static Timing Analysis (sta) Engineer – (lead Or Senior)

Boeing Australia Holdings

El Segundo, California, United States
Lead level 4: $146,200 – $197,800; senior level 5:...
100% onsite
5+ years timing closure experience
Synopsys primetime or cadence tempus proficiency
Asic tape-out signoff experience
The role involves handling pre-layout and post-layout timing for state-of-the-art digital ICs and FPGAs on critical Boeing Defense programs

Job Summary

  • The role involves handling pre-layout and post-layout timing for state-of-the-art digital ICs and FPGAs on critical Boeing Defense programs.
  • Engineers will collaborate with global electronics groups from early design stages until signoff to achieve first-pass success.
  • Boeing offers a competitive total rewards package including health insurance, retirement savings plans, and an optional 9/80 work schedule rotation.

Matching Summary

The role involves handling pre-layout and post-layout timing for state-of-the-art digital ICs and FPGAs on critical Boeing Defense programs.

Salary

Lead Level 4: $146,200 – $197,800; Senior Level 5: $176,800 - $239,200; Variable compensation opportunities available

Skills & Requirements

Must-have

  • 5+ years timing closure experience
  • Synopsys Primetime or Cadence Tempus proficiency
  • ASIC tape-out signoff experience
  • RTL to GDS flow understanding
  • Python, TCL, Perl scripting skills

Nice-to-have

  • Space-based design techniques knowledge
  • Radiation mitigation experience
  • Design for testability (DFT) familiarity
  • Leading static timing closure teams
  • Training new engineers capability

Key Requirements

  • Bachelor of Science in Engineering or related field
  • U.S. Citizenship required for security clearance
  • Ability to obtain Top Secret Clearance post-start
  • 10+ years experience for Senior level roles
  • Must be willing to work onsite in El Segundo, CA

Work Rights

Must have US citizenship

Tailored Resume

Cover Letter